Digitally controlled non-inverting buck-boost dc-dc converter system

ABSTRACT

A digitally controlled non-inverting buck-boost DC-DC converter system including a non-inverting buck-boost DC-to-DC converter control module and a negative feedback module and applicable for a radio frequency circuit module is revealed. By locking a duty cycle to two specific levels, the non-inverting buck-boost DC-to-DC converter control module only needs a single operation mode to achieve the required effects. Simultaneously, pulse-skipping phenomenon is also avoided. Furthermore, a reference voltage is modified through a reference voltage correction circuit of the negative feedback module to eliminate errors between previous DC output voltage and the reference voltage. Thereby the DC output voltage can remain in a stable state so as to reduce operational defects during the mode transition.

BACKGROUND OF THE INVENTION

1. Field of the Invention

The present invention relates to a power supply system applied to aradio frequency circuit module, especially to a digitally controllednon-inverting buck-boost DC-DC converter system applied to a radiofrequency circuit module. The pulse-skipping behavior is avoided bylocking duty-cycle. Moreover, a reference voltage is modified through areference voltage correction circuit. Thus a digital compensationcircuit neglects errors of a DC output voltage and converges into asteady state. The output voltage oscillation behavior is furtherimproved and a stable, wide range direct current is output to matchrequirements of adjustable voltage of a power amplifier in the RFcircuit module.

2. Description of Related Art

Due to broader use of wireless electronics, more and more consumersconcern that whether batteries inside the wireless electronic have apower saving setting. Generally, the power consumption of portableproducts including mobile phones, tablet computers, notebooks, etc. isrelated to the following three components: displays, antenna receiversand transmitters, and digital processors. In the antenna receivers andtransmitters, the component that consumes most of the power is a poweramplifier. The power amplifier available now can adjust the operatingvoltage. Thus a lot of energy is saved when a signal is not with thelargest strength and the battery life is extended. For example, when thewireless electronic is closer to the base station, only a little bitincreasing of the signal is required to solve the signal attenuationproblem and transmit RF signals successfully. In power source selection,a buck-boost DC-DC converter that outputs higher/lower battery voltageis the best choice. In contrast, a conventional boost converter isunable to provide proper voltage when the power amplifier requires lowpower consumption and low voltage operation. This results in a greatamount of power loss between the power converter and the poweramplifier. Yet the buck-boost DC-DC converter can avoid such problem.

The buck-boost DC-DC converter includes four switches for the buck/boostoperation by means of saving switching losses. Thus switching losses ofthe 4-switch converter may be double of those of a buck or boostconverter and this is a significant shortcoming. The solution toovercome the shortcoming mentioned-above available now is buck/boostoperation. The principle of the buck/boost operation is checking thevalues of output and input voltages so as to determine which mode theconverter is operating in. Thus there are only two switches for controlof the duty-cycle no matter which mode is used. The other two switchesare kept on-state/off-state and there are no switching losses. Thus thenumber of switching times of the switches in each cycle is decreased, soas to decrease the switching losses. However, a problem of how todetermine the timing of mode switching is derived from the buck/boostoperation. When the mode switching is not working well, pulse-skippingoccurs. Once the converter is operated within the range near the extremevalues of the duty cycle, the duty cycle sent by the controller is quiteunstable. A large jitter is generated randomly. Once the jitter occursin the steady state, the voltage has changes and further large-scalepulse-skipping occurs. Unfortunately, the mode switching timing of thebuck/boost operation may just fall on the position with the worstlinearity of the duty cycle. When the pulse-skipping mentioned aboveoccurs, unstable power output may lead to imprecise operating voltage ofthe power amplifier. The output voltage even falls to the voltage levelbeing too low during the skipping process. This causes a partialdistortion of the RF signals during the transmission process. This isalso called duty-discontinuity.

When the reference voltage value the load end of the buck-boostconverter falls within the mode switching range, the aboveduty-discontinuity occurs. That means the duty cycle is non-linear,discontinuous. The jitter duty cycle results in unstable output voltageso that the output voltage fails to converge to the reference value(voltage). The method for solving the unstable output voltage problemcaused by duty-discontinuity during mode transition available now isduty-overlapping.

The method is to overlap the duty-cycle signals of the two modes(buck/boost) within a switching cycle to get an average result andcreate a voltage value that only a single duty cycle is unable togenerate. However, the duty-overlapping method has followingdisadvantages: (a) In this method, buck/boost operation is run in turnwithin a switching cycle so that four switches of the converter all needto be switched. Thus the efficiency is reduced due to the switchinglosses. (b) The duty-overlapping must be run under a certain conditionto ensure that the pulse skipping will not occur. In order to get anaveraged and proper output voltage, there is a plurality ofcombinations. For example, when the condition of the output voltagerequired is M=0.98 (M=V_(o)/V_(bat), wherein V_(o) is an output voltagewhile V_(bat) is an input voltage), the combination can be buckmode/92%+boost mode/4%, buck mode/90%+boost mode/6% or others so as toaverage out a precise output value. The same averaged output value isresulted from different duty cycle combinations of the two modes. Thusthe duty cycle of the two modes may still have respective variations.The duty cycles must be locked in a fixed solution of a solution set soas to avoid the pulse slipping caused by different combinations of theduty cycles.

Thus there is room for improvement and a need to provide a novelbuck-boost DC-DC converter system that improves the above shortcomingscaused by duty-discontinuity.

SUMMARY OF THE INVENTION

Therefore it is a primary object of the present invention to provide apower supply system applied to a radio frequency (RF) circuit modulethat avoids pulse-skipping by locking a duty cycle. Moreover, areference voltage is modified through a reference voltage correctioncircuit so as to make a digital compensation circuit neglect errors ofDC output voltage and converge into a steady state. The output voltageoscillation behavior is further improved and a stable, wide range directcurrent is output to match requirements of adjustable voltage of a poweramplifier in the RF circuit module.

In order to achieve the above object, a digitally controllednon-inverting buck-boost DC-DC converter system of the present inventionis applied to a radio frequency (RF) circuit module. The RF circuitmodule consists of a power amplifier and an antenna connected to thepower amplifier.

The digitally controlled non-inverting buck-boost DC-DC converter systemincludes a non-inverting buck-boost DC-DC converter control module and anegative feedback module connected to an output end of the non-invertingbuck-boost DC-DC converter control module. In response to a DC inputvoltage, the non-inverting buck-boost DC-DC converter control modulechanges a time ratio of on/off state by duty cycle variations so as tooutput a DC output voltage in a buck mode or a boost mode. The RFcircuit module is connected to an output end of the non-invertingbuck-boost DC-DC converter control module. The negative feedback moduleincludes a reference voltage correction circuit a digital compensationcircuit, and a digital pulse width modulation module. The referencevoltage correction circuit is used for input of the DC output voltage,the DC input voltage and a reference voltage. The reference voltagecorrection circuit generates and sends a discrete error signal to thedigital compensation circuit. After processing, the digital compensationcircuit outputs a discrete duty cycle signal to the digital pulse widthmodulation module. After comparing the discrete duty cycle signal with adigital signal whose wave shape is similar to triangular wave, thedigital pulse width modulation module outputs a duty cycle c(t) so as tocontrol on/off state of switches of the non-inverting buck-boost DC-DCconverter control module. Thus the DC output voltage of thenon-inverting buck-boost DC-DC converter control module follows thereference voltage and gets a steady state.

In the above digitally controlled non-inverting buck-boost DC-DCconverter system, the reference voltage correction circuit includes amultiplexer, an encoder and an analog to digital conversion circuit. Themultiplexer is used to receive a duty-cycle locking signal, andselectively output the DC input voltage or the reference voltageaccording to the duty-cycle locking signal. The analog to digitalconversion circuit is for receiving the DC output voltage. In theencoder, a difference between the output voltage of the multiplexer andthe output voltage of the analog to digital conversion circuit issampled and quantified to generate a discrete error signal. When thereference voltage falls in a non-linear region of the duty cycle, theduty-cycle locking signal is initiated. Moreover, the non-linear regionof the duty cycle includes a ratio of DC output voltage to DC inputvoltage ranging from 0.95 to 1 in the buck mode and a ratio of DC outputvoltage to DC input voltage ranging from 1 to 1.05 in the boost mode.Thereby the duty cycle is locked to two specific levels and thenon-inverting buck-boost DC-DC converter control module only needs asingle operation mode to reach effects required effect. Compared withconventional overlap method of the duty cycle, switching times of theswitches in each cycle are decreased to reduce the switching losses.Furthermore, by pulse-skipping can be avoided by locking the duty cycledirectly. Then the reference voltage is modified properly through thereference voltage correction circuit so as to eliminate errors betweenoriginal DC output voltage and the reference voltage. Thus the DC outputvoltage is maintained at a stable level to improve the operationaldefects during the mode transition of the non-inverting buck-boost DC-DCconverter control module.

In the above digitally controlled non-inverting buck-boost DC-DCconverter system, the non-inverting buck-boost DC-DC converter controlmodule consists of a first switch connected to a positive electrode ofthe DC input voltage, a second switch whose two ends are connected tothe first switch and a negative electrode of the DC input voltagerespectively, an inductor connected to the first switch and the secondswitch respectively, a third switch connected to the inductor and thenegative electrode of the DC input voltage respectively, a fourth switchconnected to the inductor and the third switch respectively, and acapacitor connected to the fourth switch and the negative electrode ofthe DC input voltage respectively.

In the digitally controlled non-inverting buck-boost DC-DC convertersystem, mentioned above, the digital compensation circuit includes acompensation voltage lookup table (LUT) conversion circuit. Duringswitching of the buck mode or the boost mode, the compensation voltagelookup table conversion circuit 1221 is reset to make the discrete errorsignal return to zero. Furthermore, the output end of the referencevoltage correction circuit is connected to a transient time estimationmodule. During switching of the buck mode or the boost mode, thecompensation voltage lookup table conversion circuit is controlled bythe transient time estimation module to be reset after a specific periodof time. Thus the DC output voltage will not change greatly. By theestimation of the specific period of time of the transient timeestimation module and reset of the compensation voltage lookup tableconversion circuit, the process of the non-inverting buck-boost DC-DCconverter control module to reach a steady state after the modeswitching is accelerated and there is no output error or largertransient oscillation occurred. The unstable output voltage problem ofconventional digital compensation circuit caused by back delay, poortransient speed or the like during mode transition can be solved. At thesame time, the possibility of both brief inductor current surge andcomponent burn out can be reduced. The specific period of time isobtained by calculation, i.e. a difference between the DC input voltageand the DC output voltage is divided by a maximum change of discreteduty-cycle signal within a switching cycle and then times the switchingcycle.

In the digitally controlled non-inverting buck-boost DC-DC convertersystem, mentioned above, the output end of the digital pulse widthmodulation module is connected to a dead time control circuit 13 forcontrol of dead time to minimize energy loss of switches of thenon-inverting buck-boost DC-DC converter control module duringswitching.

BRIEF DESCRIPTION OF THE DRAWINGS

The structure and the technical means adopted by the present inventionto achieve the above and other objects can be best understood byreferring to the following detailed description of the preferredembodiments and the accompanying drawings, wherein

FIG. 1 is a block diagram showing circuit configuration of an embodimentof a digitally controlled non-inverting buck-boost DC-DC convertersystem applied to a radio frequency (RF) circuit module according to thepresent invention;

FIG. 2 is a circuit diagram of a non-inverting buck-boost DC-DCconverter control module and a RF circuit module of an embodimentaccording to the present invention;

FIG. 3 is a block diagram showing circuit configuration of a referencevoltage correction circuit according to the present invention;

FIG. 4 is a block diagram showing circuit configuration of anotherembodiment of a digitally controlled non-inverting buck-boost DC-DCconverter system applied to a radio frequency circuit module accordingto the present invention;

FIG. 5 is schematic drawing showing transient response of a compensationvoltage lookup table conversion circuit without being reset by atransient time estimation module after a specific period of timeaccording to the present invention;

FIG. 6 is schematic drawing showing transient response of a compensationvoltage lookup table conversion circuit being reset by a transient timeestimation module after a specific period of time according to thepresent invention;

FIG. 7 is a block diagram showing circuit configuration of a furtherembodiment of a digitally controlled non-inverting buck-boost DC-DCconverter system applied to a radio frequency circuit module accordingto the present invention.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT

Refer to FIG. 1, a block diagram showing circuit configuration of anembodiment of a digitally controlled non-inverting buck-boost DC-DCconverter system applied to a radio frequency circuit module isrevealed. A digitally controlled non-inverting buck-boost DC-DCconverter system 1 of the present invention is applied to a radiofrequency (RF) circuit module 2. The RF circuit module 2 consists of apower amplifier 21 and an antenna 22 connected to the power amplifier21.

The digitally controlled non-inverting buck-boost DC-DC converter system1 includes a non-inverting buck-boost DC-DC converter control module 11and a negative feedback module 12 connected to an output end of thenon-inverting buck-boost DC-DC converter control module 11. Thenon-inverting buck-boost DC-DC converter control module 11 changes atime radio of on/off state by a duty cycle c(t) so as to output a DCoutput voltage V_(o) in a buck mode or a boost mode in response to a DCinput voltage V_(bat). The RF circuit module 2 is connected to an outputend of the non-inverting buck-boost DC-DC converter control module 11.

Refer to FIG. 2, an internal circuit diagram of the non-invertingbuck-boost DC-DC converter control module 11 and the RF circuit module 2is disclosed. The non-inverting buck-boost DC-DC converter controlmodule 11 is composed of a first switch S₁ connected to a positiveelectrode of the DC input voltage V_(bat), a second switch S₂ whose twoends are connected to the first switch S₁ and a negative electrode ofthe DC input voltage V_(bat) respectively, an inductor L connected tothe first switch S₁ and the second switch S₂ respectively, a thirdswitch S₃ connected to the inductor L and the negative electrode of theDC input voltage V_(bat) respectively, a fourth switch S₄ connected tothe inductor L and the third switch S₃ respectively, and a capacitor Cconnected to the fourth switch S₄ and the negative electrode of the DCinput voltage V_(bat) respectively. The RF circuit module 2 is connectedto the capacitor C in parallel. The first switch S₁, the second switchS₂, the third switch S₃, and the fourth switch S₄ can be ametal-oxide-semiconductor field effect transistor (MOSFET) or aninsulated gate bipolar transistor (IGBT). In this embodiment, they areall MOSFET.

The negative feedback module 12 is connected to an output end of thenon-inverting buck-boost DC-DC converter control module 11 and is havinga reference voltage correction circuit 121, a digital compensationcircuit 122, and a digital pulse width modulation module 123. Thereference voltage correction circuit 121 is used for input of DC outputvoltage V_(o), DC input voltage V_(bat) and a reference voltage V_(ref).Refer to FIG. 3, the reference voltage correction circuit 121 includes amultiplexer 1211, an encoder 1213 and an analog to digital conversioncircuit 1212. The multiplexer 1211 is used to receive a duty-cyclelocking signal DT_(s-lock), and control the output of the DC inputvoltage V_(bat) or the reference voltage V_(ref) according to theduty-cycle locking signal. The analog to digital conversion circuit 1212is used for receiving the DC output voltage V_(o). In the encoder 1213,a difference between the output voltage of the multiplexer 1211 and theoutput voltage of the analog to digital conversion circuit 1212 issampled and quantified to generate a discrete error signal e[n]. Theduty-cycle locking signal DT_(s-lock) is generated when the referencevoltage V_(ref) falls in a non-linear region of the duty cycle c(t). Thenon-linear region of the duty cycle c(t) includes a ratio of DC outputvoltage V_(o) to DC input voltage V_(bat) ranging from 0.95 to 1 in thebuck mode and a ratio of DC output voltage V_(o) to DC input voltageV_(bat) ranging from 1 to 1.05 in the boost mode. The above referencevoltage correction circuit 121 generates a discrete error signal e[n] tothe digital compensation circuit 122. After processing of the digitalcompensation circuit 122, a discrete duty cycle signal d[n] is output tothe digital pulse width modulation module 123. The digital pulse widthmodulation module 123 outputs a duty cycle c(t) by comparing thediscrete duty cycle signal d[n] with a digital signal whose wave shapeis similar to triangular waves, so as to control on/off state ofswitches of the non-inverting buck-boost DC-DC converter control module11. Thus the DC output voltage V_(o) of the non-inverting buck-boostDC-DC converter control module 11 can follow the reference voltageV_(ref) and become stable.

Moreover, the digital compensation circuit 122 includes a compensationvoltage lookup table (LUT) conversion circuit 1221. The dynamic range ofthe discrete error signal e[n] into the digital compensation circuit 122is not large, only 3˜4 bits. Thus the lookup table is used to replace amultiplier so as to implement a digital compensator. Then, while thediscrete error signal e[n] entering the digital compensation circuit122, a corresponding memory address is selected according to the valueof the discrete error signal e[n] and next get its content to beprocessed by adders, so as further to obtain the discrete duty cyclesignal d[n] at the moment. In this embodiment, the digital compensationcircuit 122 is a digital PID (proportional integral derivative)compensator.

While the digitally controlled non-inverting buck-boost DC-DC convertersystem 1 is in use, its mode operation is to set the duty ratio of thebuck mode and the duty ratio of the boost mode at 100% and 5%respectively, so as to maintain the duty cycle c(t) at a constant value.100% duty ratio means that the duty-cycle c(t) is on-state, so that theDC output voltage V_(o) is equal to the DC input voltage V_(bat)(M=1)when the non-inverting buck-boost DC-DC converter control module 11 isin discontinuous operation area of the buck mode (i.e. the referencevoltage V_(ref) falls within a range of 0.95<M<1). This is an onlystable state within the mode-transition. At the same time, it is ensuredthat the DC output voltage V_(o) is higher than the reference voltageV_(ref) so that the power amplifier 21 will not malfunction. When thenon-inverting buck-boost DC-DC converter control module 11 is enteringdiscontinuous operation area of the boost mode (i.e. reference voltageV_(ref) falls within a range of 1<M<1.05), 5% duty ratio means that theduty cycle c(t) is quite low but already falling in a normal continuousarea. Thus there is no jitter in the steady state. Furthermore, the DCoutput voltage V_(o) is about 1.05 times of the DC input voltageV_(bat)(M=1.05) when the duty ratio is 5%. The DC output voltage V_(o)is also higher than the reference voltage V_(ref) and this satisfies thepremise of correct operation of the power amplifier. Thereby, once thenegative feedback module 12 detects that the reference voltage entersthe mode transition area, it locks the output duty-cycle c(t) at theconstant value mentioned above so as to stabilize the DC output voltageV_(o). Compared with conventional technique that pursues “continuity ofthe output voltage”, the present invention compulsorily locks the dutycycle c(t) so as to achieve stabilization of the DC output voltage V_(o)during the mode-transition.

Refer to FIG. 3, when the non-inverting buck-boost DC-DC convertercontrol module 11 works well, the multiplexer 1211 delivers thereference voltage V_(ref) directly to the output voltage of the analogto digital conversion circuit 1212 for calculating the discrete errorsignal e[n]. If the duty-cycle locking signal DT_(s-lock) is generated,the multiplexer 1211 changes to send out the DC input voltage V_(bat).For example, when the DC input voltage V_(bat) is 3.0 Volt and thenon-inverting buck-boost DC-DC converter control module 11 operates in aspecific condition of “buck mode/100% duty ratio”, discrete componentson a current path will have a bit voltage drop due to parasiticresistance. Thus the DC output voltage V_(o) becomes 2.95 Volt. Once apiece of information the multiplexer 1211 sends to the encoder 1213modifies the original reference voltage V_(ref) into 2.95 Volt, thenegative feedback module 12 falsely assumes that the output target is2.95 Volt and automatically converges the duty cycle c(t) to 100%. Thedigital compensation circuit 122 finally stabilizes the DC outputvoltage V_(o) at 2.95 Volt. Moreover, the value of the DC output voltageV_(o) and the value of the modified reference voltage are both 2.95Volt. This leads to a result that the discrete error signal e[n] must bezero. Thus the digital compensation circuit 122 learns that the systemis stable and it will not modify the discrete duty cycle signal d[n].Therefore the duty cycle c(t) is locked in a specific condition of “buckmode/100% duty ratio” for a long term. The system has stablespecifications after close loop compensation and there is no outputerror or larger transient oscillation during the transient convergenceprocess.

Furthermore, the above mode operation will cause the discrete duty cyclesignal d[n] being amplified seriously. For example, when the referencevoltage V_(ref) suddenly increases to a quite high value, therequirement of the DC output voltage V_(o) is unable to be satisfiedeven the discrete duty cycle signal d[n] in the buck mode increases tothe maximum value. Thus the non-inverting buck-boost DC-DC convertercontrol module 11 is switched to the boost mode so as to increase the DCoutput voltage V_(o) continuously. Due to the mode change, the discreteduty cycle signal d[n] may need to change from a larger value before themode transition to a smaller one immediately after the mode transition.However, there is a limit on the digital compensation circuit 122 tomodify the discrete duty cycle signal d[n]. It may take several tohundreds of switching cycles for revising down the discrete duty cyclesignal d[n]. During the period of revising down, the non-invertingbuck-boost DC-DC converter control module 11 is switched to the boostmode so that the duty cycle becomes abnormally high and the DC outputvoltage V_(o) is suddenly pulled up at the moment of mode transition.Thus the present invention resets the compensation voltage lookup table(LUT) conversion circuit 1221 to make the discrete error signal e[n]return to zero during switching of the buck mode or the boost mode.Thereby the non-inverting buck-boost DC-DC converter control module 11can switch the modes smoothly, without any problem of rapidly-increasingof the voltage.

Refer to FIG. 4, another embodiment of the present invention isrevealed. The difference between this embodiment and the above one is inthat the output end of the reference voltage correction circuit 121 isconnected to a transient time estimation module 124. During switching ofthe buck mode or the boost mode, the transient time estimation module124 controls the compensation voltage lookup table conversion circuit1221 to be reset after a specific period of time T. Thus the DC outputvoltage V_(o) will not change a great deal. The specific period of timeT is obtained by calculation, i.e. the difference between the DC inputvoltage V_(bat) and the DC output voltage V_(o) is divided by themaximum variation of the discrete duty cycle signal d[n] within aswitching cycle and then times the switching cycle. In use, when thereference voltage V_(ref) suddenly changes and the operation of thenon-inverting buck-boost DC-DC converter control module 11 needs to beswitched, a duty-cycle locking signal DT_(s-lock) is generated and thereference voltage V_(ref) is corrected to the DC input voltage V_(bat)by the reference voltage correction circuit 121. Now the non-invertingbuck-boost DC-DC converter control module 11 uses the DC input voltageV_(bat) as a target and converges the DC output voltage V_(o) to the DCinput voltage V_(bat). When the DC output voltage V_(o) is gettingcloser to the DC input voltage V_(bat), the discrete error signal e[n]entering the digital compensation circuit 122 is reduced and the errorbetween the DC input voltage V_(bat) and the DC output voltage V_(o)falls into a correction range of the discrete duty cycle signal d[n].Within such condition, the compensation voltage lookup table conversioncircuit 1221 is reset so that an instant change of the duty-cycle c(t)will not cause the DC output voltage V_(o) to have a great change. Thusan equivalent open loop of the digital compensation circuit 122 can beavoided. Refer to FIG. 5 and FIG. 6, schematic drawings showingtransient response of the compensation voltage lookup table conversioncircuit 1221 without being reset by the transient time estimation module124 after a specific period of time T and being reset by the transienttime estimation module 124 after a specific period of time Trespectively are revealed. From the figures, t is obvious that thespecific period of time T is the time needed for converging the DCoutput voltage V_(o) to the DC input voltage V_(bat) before reset of thecompensation voltage lookup table conversion circuit 1221. Thus duringthe step of mode transition, there is a short process for reducingoutput gap. The specific time period T is estimated by the transienttime estimation module 124 and then the compensation voltage lookuptable conversion circuit 1221 is reset after the specific time period Tso as to accelerate the process that the non-inverting buck-boost DC-DCconverter control module 11 reaches a steady state after mode transitionfor preventing output errors and avoiding larger transient oscillation.

Refer to FIG. 7, a further embodiment is revealed. The differencebetween this embodiment and the above one is in that an output end ofthe digital pulse width modulation module 123 of this embodiment isfurther connected to a dead time control circuit 13 for control of deadtime to minimize energy loss of the non-inverting buck-boost DC-DCconverter control module 11 during switching of switches. The dead timeoccurs because that electric energy stored in the parasitic capacitanceC will increase the time that switches turn on and off in thenon-inverting buck-boost DC-DC converter control module 11 to cause thephenomenon that all the switches are on-state at the same time. Forexample, refer to FIG. 2, once a switching interval of the first switchS₁ and the second switch S₂ is too short (the dead time is too short),the first switch and the second switch may be conducting at the sametime because one of them is not turned off completely. Thus the DC inputvoltage V_(bat) is connected directly to have short circuit and ashoot-through current occurs. This is not only wasting energy butcomponents in the non-inverting buck-boost DC-DC converter controlmodule 11 are also easy to get damaged. On the other hand, once the deadtime is designed too long, the time for turning off the two switches atthe same time will get too long. In practice, the dead time is fixedaccording to the time that the switches need to be switched so as toprevent waste of energy during switching of respective switch.

In summary, a digitally controlled non-inverting buck-boost DC-DCconverter system of the present invention has following advantages:

-   1. The present invention avoids pulse-skipping phenomenon by direct    locking of duty cycle. The requirement for keeping the duty-cycle in    a constant value is satisfied. Then the reference voltage is    corrected properly by the reference voltage correction circuit to    eliminate the errors between original DC output voltage and the    reference voltage.

This is another condition that avoids duty-cycle oscillation. Thus theDC output voltage can be maintained at a stable level so as to reduceoperational defects of the non-inverting buck-boost DC-DC convertercontrol module during the mode transition.

-   2. The digitally controlled non-inverting buck-boost DC-DC converter    system of the present invention locks the duty cycle to two specific    levels, without being affected by variations of the reference    voltage. Thus the non-inverting buck-boost DC-to-DC converter    control module only needs a single operation mode to achieve the    required effects. Compared with the conventional duty overlapping,    the switching times of the switches in each cycle can be reduced so    as to minimize the switching losses.-   3. The present invention resets the compensation voltage lookup    table (LUT) conversion circuit after a specific period of time    estimated by the transient time estimation module. Thus the    non-inverting buck-boost DC-DC converter control module reaches a    steady state more rapidly after the mode transition. Therefore the    output errors and larger transient oscillation are further avoided    and the problem of unstable output voltage of conventional digital    compensation circuit caused by various factors such as back delay,    poor transient speed or the like during mode transition is solved.    At the same time, the possibility of both brief inductor current    surge and component burn out is reduced.

Additional advantages and modifications will readily occur to thoseskilled in the art. Therefore, the invention in its broader aspects isnot limited to the specific details, and representative devices shownand described herein. Accordingly, various modifications may be madewithout departing from the spirit or scope of the general inventiveconcept as defined by the appended claims and their equivalent.

What is claimed is:
 1. A digitally controlled non-inverting buck-boost DC-DC converter system applied to a radio frequency (RF) circuit module, the system comprising: a non-inverting buck-boost DC-DC converter control module that changes a time ratio of on/off state of switches by a duty cycle to output a DC output voltage in a buck mode or a boost mode in response to a DC input voltage and the RF circuit module is connected to an output end of the non-inverting buck-boost DC-DC converter control module; and a negative feedback module that is connected to an output end of the non-inverting buck-boost DC-DC converter control module and is having a reference voltage correction circuit, a digital compensation circuit, and a digital pulse width modulation module; the reference voltage correction circuit is used for input of the DC output voltage, the DC input voltage and a reference voltage; the reference voltage correction circuit generates and sends a discrete error signal to the digital compensation circuit; then the digital compensation circuit outputs a discrete duty cycle signal to the digital pulse width modulation module after processing; the digital pulse width modulation module outputs the duty cycle after comparing the discrete duty cycle signal with a digital signal whose wave shape is similar to triangular wave so as to control on/off state of switches of the non-inverting buck-boost DC-DC converter control module; thus the DC output voltage of the non-inverting buck-boost DC-DC converter control module follows the reference voltage and reaches a steady state.
 2. The system as claimed in claim 1, wherein the reference voltage correction circuit includes a multiplexer, an encoder and an analog to digital conversion circuit; the multiplexer is used to receive a duty-cycle locking signal, and control the output of the DC input voltage or the reference voltage according to the duty-cycle locking signal; the analog to digital conversion circuit is for receiving the DC output voltage; in the encoder, a difference between the output voltage of the multiplexer and the output voltage of the analog to digital conversion circuit is sampled and quantified to generate a discrete error signal; wherein the duty-cycle locking signal is generated when the reference voltage falls in a non-linear region of the duty cycle.
 3. The system as claimed in claim 2, wherein the non-linear region of the duty cycle includes a ratio of DC output voltage to DC input voltage ranging from 0.95 to 1 in the buck mode and a ratio of DC output voltage to DC input voltage ranging from 1 to 1.05 in the boost mode.
 4. The system as claimed in claim 1, wherein the non-inverting buck-boost DC-DC converter control module includes a first switch connected to a positive electrode of the DC input voltage, a second switch connected to the first switch and a negative electrode of the DC input voltage respectively, an inductor connected to the first switch and the second switch respectively, a third switch connected to the inductor and the negative electrode of the DC input voltage respectively, a fourth switch connected to the inductor and the third switch respectively, and a capacitor connected to the fourth switch and the negative electrode of the DC input voltage respectively.
 5. The system as claimed in claim 4, wherein each of the first switch, the second switch, the third switch, and the fourth switch is able to be either a metal-oxide-semiconductor field effect transistor (MOSFET) or an insulated gate bipolar transistor (IGBT).
 6. The system as claimed in claim 1, wherein the digital compensation circuit includes a compensation voltage lookup table (LUT) conversion circuit.
 7. The system as claimed in claim 6, wherein during switching of the buck mode or the boost mode, the compensation voltage look up table conversion circuit is reset to make the discrete error signal return to zero.
 8. The system as claimed in claim 7, wherein an output end of the reference voltage correction circuit is connected to a transient time estimation module; during switching of the buck mode or the boost mode, the compensation voltage lookup table conversion circuit is controlled by the transient time estimation module to be reset after a specific period of time so that the DC output voltage will not have a great variation.
 9. The system as claimed in claim 8, wherein a difference between the DC input voltage and the DC output voltage is divided by the maximum variation of the discrete duty cycle signal within a switching cycle and then times the switching cycle so as to get the specific period of time.
 10. The system as claimed in claim 1, wherein an output end of the digital pulse width modulation module is connected to a dead time control circuit for control of dead time to minimize energy loss of the switches of the non-inverting buck-boost DC-DC converter control module during switching.
 11. The system as claimed in claim 1, wherein the RF circuit module includes a power amplifier and an antenna connected to the power amplifier. 